Digital Design Diagram Creators

DATAmundi.ai is preparing for an upcoming large-scale dataset project. We expect to onboard approximately 50–100 experts within a short timeframe.

To support smooth and efficient launch, we are expanding our expert pool in advance.

Who We Are Looking For

Individuals with knowledge or studies in:

• digital systems, hardware design, digital logic and electronics,
• FPGA/ASIC fundamentals,
• HDL languages (Verilog / SystemVerilog preferred; VHDL optional)
• Proficiency in English sufficient to follow instructions and communicate clearly.
• Ideal profile: recent graduates of technical fields or enthusiasts with relevant practical experience.

Project Overview

• The project involves creating a dataset of diagram images paired with one of two types of technical artefacts:
• Diagram + HDL code (Verilog/SystemVerilog)

Diagram + English technical explanation of the diagram

Workload distribution: 50% code-based, 50% description-based.

The required diagram types include:

circuit diagrams, timing diagrams (waveforms), state diagrams (finite state machines). (With a near-even distribution across all three categories.)

Additional requirements:

• At least 60% gate-level diagrams
• No more than 30% simple diagrams
• Topics include processors, memory components, digital circuits, and standard protocols (e.g., AMBA AXI).
• Conditions
• Estimated hourly rate: ~20 USD/h
• Fully remote, candidates can be located anywhere
• Flexible work, but availability should support handling high task volumes.
• Salary: $20 hourly Originally posted on Himalayas